Rockwell Automation 1771-IJ_IK IK ENCODER/COUNTER MODULES - Manual (Page 51)

6–7 Block Transfer Programming
Publication 1771ĆUM006B-EN-P - June 2002
PLCĆ3 Family Processors
Use the following ladder logic with PLC-3 or PLC-3/10 processors.
This program assumes that your application requires a single BTR
and BTW instruction to pass data between the processor and the
module.
Ladder logic alternates the execution of BTR and BTW instructions.
The processor checks data validity before accepting read data, and
sets one enable bit at a time.
Refer to Figure 6.5 for generalized ladder logic, and to Figure 6.6 for
example ladder logic with entered values.
Figure 6.5
Generalized Ladder Logic for PLCĆ3 Block Transfer
BTW
R
G
M
Data
Length
Cntl
XOR
A = BTR cntl
B = BTR cntl
R = BTR cntl
XOR
A = BTW cntl
B = BTW cntl
R = BTW cntl
PLC-3
Power
AC
Loss
Bit
LE
EQU
A = BTW cntl
B = BTR cntl
BTR
DN
DN
ER
BTR
R
G
M
Data
Length
Cntl
LE
DN
ER
BTW
DN
1
2
3
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