Rainbow Electronics DS2130Q - Manual (Page 3)

DS2130Q
041295 3/22
PIN DESCRIPTION TYPE SYMBOL
25 PCMFS I PCM side frame sync. An 8 KHz clock signal must be applied for the PCM data
interface. Lower sample rates can be used to reduce the effective bit rate but may
result in unusable DTMF detection and generation as well as lower voice quality.
PCMFS is normally tied to CPXFS.
26 PCMCLK I PCM side data clock. This is the clock used to sample PCM serial data at
PCMIN, to output data at PCMOUT and to determine the proper time slot.
PCMCLK must be synchronous with PCMFS.
27 PCMIN I PCM data input. This is the input for the 8-bit serial PCM data which would nor-
mally be supplied by a codec/filter device. Data is sampled on falling edges of
PCMCLK.
28 V
cc
- Positive supply input. Tie to system +5 volt supply.