Rainbow Electronics DS2130Q User Manual

Page 10

DS2130Q

041295 10/22

OUTPUT TIME SLOT REGISTER Figure 7

(MSB)

(LSB)

SYMBOL

POSITION

NAME AND DESCRIPTION

OTR.7

Reserved; must be zero for proper operation.

OTR.6

Reserved; must be zero for proper operation.

OTR.5

MSB of output time slot register.

OTR.4

OTR.3

OTR.2

OTR.1

OTR.0

LSB of output time slot register.

TIME SLOT ASSIGNMENT/ORGANIZATION

Onboard counters establish when PCM and compres-
sion/expansion I/O occurs. The counters are pro-
grammed via the time slot registers. Time slot size
(number of bits wide) is 8 bits for PCMIN PCMOUT and
4 bits for CPXIN, CPXOUT (except if CXS3=1; CPXIN
and CPXOUT use 8-bit time slots in this case). The
number of time slots available is 32 for the PCM-side in-
terface and 64 for the CPX-side interface (32 if

CXS3=1). However, the data clocks PCMCLK and
CPXCLK must be at least 256 X PCMFS to properly ac-
cess all 32 or 64 time slots (for example, PCMCLK must
equal 2.048 MHz if PCMFS=8 KHz). The time slot orga-
nization is independent of the compression/expansion
bit rate selected. NOTE: Time slots are counted from
the first rising edge of either PC MCLK or CPXCLK after
the frame sync rising edge at PCMFS or CPXFS.

DS2130 CPX-SIDE INTERFACE Figure 8

MSB

LSB

3–STATE

DON’T CARE

MSB

LSB

TIME

SLOT 46

TIME

SLOT 47

TIME

SLOT 0

TIME

SLOT 0

TIME

SLOT 1

TIME

SLOT N

CPXCLK

CPXFS

CPXIN

CPXOUT