Rainbow Electronics MAX5965B - Manual (Page 6)

MAX5965A/MAX5965B
High-Power, Quad, Monolithic, PSE Controllers
for Power over Ethernet
6 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V AGND = 32V to 60V, V EE = 0V, V DD to V DGND = +3.3V, all voltages are referenced to V EE , unless otherwise noted. Typical values are at
V AGND = +48V, V DGND = +48V, V DD = (V DGND + 3.3V), T A = +25°C. Currents are positive when entering the pin and negative other-
wise.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DIGITAL INPUTS/OUTPUTS (Referred to DGND)
Digital Input Low V IL 0.9 V
Digital Input High V IH 2.4 V
Internal Input Pullup/Pulldown
Resistor
R DIN
Pullup (pulldown) resistor to V DD (DGND) to
set default level
25 50 75 k Ω
O p en- D r ai n O utp ut Low V ol tag e V OL I SINK = 15mA 0.4 V
Digital Input Leakage I DL Input connected to the pull voltage 2 µA
Open-Drain Leakage I OL Open-drain high impedance, V OUT_ = 3.3V 2 µA
TIMING
Startup Time t START
Time during which a current limit set by
V
SU_LIM is allowed, starts when the GATE_ is
turned on (Note 9)
50 60 70 ms
Fault Time t FAULT
Maximum allowed time for an overcurrent
condition set by V
FLT_LIM after startup
(Note 9)
50 60 70 ms
Port Turn-Off Time t OFF
Minimum delay between any port turning off,
does not apply in case of a reset
0.5 ms
Detection Reset Time
Time allowed for the port voltage to reset
before detection starts
80 90 ms
Detection Time t DET
Maximum time allowed before detection is
completed
330 ms
M i d sp an M od e D etecti on D el ay t DMID 2.0 2.4 s
Classification Time t CLASS Time allowed for classification 19 23 ms
V EEUVLO Turn-On Delay t DLY
Time V AGND must be above the V EEUVLO
thresholds before the device operates
2 4 ms
RSTR bits = 00
16 x
t FAULT
RSTR bits = 01
32 x
t FAULT
RSTR bits = 10
64 x
t FAULT
Restart Timer t RESTART
Time a port has to wait
before turning on after an
overcurrent fault during
normal operation,
RSTR_EN_ bits = high
RSTR bits = 11 0
ms
Watchdog Clock Period t
WD
Rate of decrement of the watchdog timer 164 ms
ADC PERFORMANCE
Resolution 9 Bits
Range 0.51 V
LSB Step Size 1 mV
Integral Nonlinearity (Relative) INL 0.2 1.5 LSB