Rainbow Electronics MAX5965B - Manual (Page 29)

MAX5965A/MAX5965B
High-Power, Quad, Monolithic, PSE Controllers
for Power over Ethernet
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If the port remains in current limit or the PGOOD condi-
tion is not met at the end of the startup period, the port
shuts down and the corresponding STRT_FLT_ is set to
1. A 1 in any of the STRT_FLT_ bits forces R00h[6] to 1.
IVC_ is set to 1 whenever the port current exceeds the
maximum allowed limit for the class (determined during
the classification process). A 1 in any of IVC_ forces
R00h[6] to 1. When the CL_DISC (R17h[2]) is set to 1, the port also limits the load current according to its
class as specified in the
Electrical Characteristics table.
As with any of the other events register, the startup
event register has two addresses. When read through
the R08h address, the content of the register is left
unchanged. When read through the CoR R09h
address, the register content is cleared. A reset sets
R08h/R09h = 00h.
Table 10. Fault Event Register
ADDRESS
06h 07h SYMBOL BIT
R/W R/W
DESCRIPTION
LD_DISC4 7 R CoR Disconnect on port 4
LD_DISC3 6 R CoR Disconnect on port 3
LD_DISC2 5 R CoR Disconnect on port 2
LD_DISC1 4 R CoR Disconnect on port 1
IMAX_FLT4 3 R CoR Overcurrent on port 4
IMAX_FLT3 2 R CoR Overcurrent on port 3
IMAX_FLT2 1 R CoR Overcurrent on port 2
IMAX_FLT1 0 R CoR Overcurrent on port 1
Table 11. Startup Event Register
ADDRESS
08h 09h SYMBOL BIT
R/W R/W
DESCRIPTION
IVC4 7 R CoR Class overcurrent flag for port 4
IVC3 6 R CoR Class overcurrent flag for port 3
IVC2 5 R CoR Class overcurrent flag for port 2
IVC1 4 R CoR Class overcurrent flag for port 1
STRT_FLT4 3 R CoR Startup failed on port 4
STRT_FLT3 2 R CoR Startup failed on port 3
STRT_FLT2 1 R CoR Startup failed on port 2
STRT_FLT1 0 R CoR Startup failed on port 1
LD_DISC_ is set high whenever the corresponding port
shuts down due to detection of load removal.
IMAX_FLT_ is set high when the port shuts down due to
an extended overcurrent event after a successful start-
up. A 1 in any of the LD_DISC_ bits forces R00h[2] to 1.
A 1 in any of the IMAX_FLT_ bits forces R00h[5] to 1. As with any of the other events register, the fault event
register has two addresses. When read through the
R06h address, the content of the register is left
unchanged. When read through the CoR R07h
address, the register content is cleared. A reset sets
R06h/R07h = 00h.