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3 die layout – Texas Instruments Digital Signal Processor SM320F2812-HT User Manual

Page 14

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SM320F2812-HT

SGUS062B

JUNE 2009

REVISED JUNE 2011

www.ti.com

2.3

Die Layout

The SM320F2812 die layout is shown in

Figure 2-1

. See

Table 2-3

for a description of each pad's

function.

Figure 2-1. SM320F2812 Die Layout

Table 2-2. Bare Die Information

DIE PAD

DIE PAD

DIE

BACKSIDE

BACKSIDE

DIE SIZE

DIE PAD SIZE

COMPOSITI

COORDINATES

THICKNESS

FINISH

POTENTIAL

ON

219.4 x 207.0 (mils);

Silicon with

55.0 x 64.0 (

μ

m)

See

Table 2-3

11.0 mils

AlCu/TiN

Ground

5572.0 x 5258.0 (

μ

m)

backgrind

14

Introduction

Copyright

©

2009

2011, Texas Instruments Incorporated

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