Section 4.10 – Texas Instruments TMS320TCI6486 User Manual
Page 85
www.ti.com
MDIO Registers
4.10 MDIO User Command Complete Interrupt Mask Set Register (USERINTMASKSET)
The MDIO user command complete interrupt mask set register (USERINTMASKSET) is shown in
and described in
.
Figure 37. MDIO User Command Complete Interrupt Mask Set Register (USERINTMASKSET)
31
16
Reserved
R-0
15
2
1
0
USERINT
Reserved
MASKSET
R-0
R/WC-0
LEGEND: R = Read only; R/WC = Read/Write 1 to clear; -n = value after reset
Table 30. MDIO User Command Complete Interrupt Mask Set Register (USERINTMASKSET) Field
Descriptions
Bit
Field
Value
Description
31-2
Reserved
0
Reserved
1-0
USERINTMASKSET
MDIO user interrupt mask set for USERINTMASKED[1:0] respectively. Setting a bit to 1 will
enable MDIO user command complete interrupts for that particular USERACCESS register.
MDIO user interrupt for a particular USERACCESS register is disabled if the corresponding bit
is 0. Writing a 0 to this register has no effect.
85
SPRUEF8F – March 2006 – Revised November 2010
C6472/TCI6486 EMAC/MDIO
Copyright © 2006–2010, Texas Instruments Incorporated