Texas Instruments TMS320TCI6486 - Manual (Page 5)

www.ti.com
5.43 MAC Address Low Bytes Register (MACADDRLO) ............................................................. 141
5.44 MAC Address High Bytes Register (MACADDRHI) ............................................................. 142
5.45 MAC Index Register (MACINDEX)
.................................................................................
143
5.46 Transmit Channel 0-7 DMA Head Descriptor Pointer Register (TXnHDP)
...................................
144
5.47 Receive Channel 0-7 DMA Head Descriptor Pointer Register (RXnHDP) .................................... 145
5.48 Transmit Channel 0-7 Completion Pointer Register (TXnCP) .................................................. 146
5.49 Receive Channel 0-7 Completion Pointer Register (RXnCP) .................................................. 147
5.50 Network Statistics Registers ........................................................................................ 148
Appendix A Glossary ............................................................................................................... 157
Appendix B Revision History ..................................................................................................... 159
5 SPRUEF8F – March 2006 – Revised November 2010 Contents
Submit Documentation Feedback
Copyright © 2006–2010, Texas Instruments Incorporated