Texas Instruments TMS320TCI6486 - Manual (Page 25)

TX_CLK
TXD
TX_SYNC
RX_CLK
RXD
RX_SYNC
MDCLK
MDIO
EMAC
MDIO
System
core
Physical
layer
device
(PHY)
MHZ_125_CLK
125-MHz
zero-delay
clock buffer
125-MHz
XO
www.ti.com EMAC Functional Architecture
2.3.5 Source Synchronous Serial Media Independent Interface (S3MII) Connections
Figure 6 shows a TCI6486/C6472 device with an integrated EMAC and MDIO interface via S3MII
connections connected to a PHY. The S3MII interface supports source synchronous 10-Mbps and
100-Mbps operations with full- and half-duplex support.
Figure 6. Ethernet Configuration with S3MII Interface
25 SPRUEF8F – March 2006 – Revised November 2010 C6472/TCI6486 EMAC/MDIO
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