Texas Instruments MSP50C6xx - Manual (Page 39)

Memory Organization: RAM and ROM
2-15 MSP50C6xx Architecture
2.6 Memory Organization: RAM and ROM
Data memory (RAM) and program memory (ROM) are each restricted to
internal blocks on the C6xx. The program memory is read-only and limited to
32K, 17-bit words. The lower 2048 of these words is reserved for an internal
test code and is not available to the user. The data memory is static RAM and
is limited to 640, 17-bit words. 16 bits of the 17-bit RAM are used for the data
value, while the extra bit is used as a status flag.
The C6xx does not have the capability to execute instructions directly from
external memory. However, additional program memory (external ROM) can
be accessed using the general-purpose I/O. The interface for external ROM
must be configured in the software.
2.6.1 Memory Map
The memory map for the C6xx is shown in Figure 2–7. Refer to Section 2.6.3,
Interrupt Vectors, for more detailed information regarding the interrupt vectors,
and to Section 2.6.2, Peripheral Communications (Ports), for more information
on the I/O communications ports.