Silicon Laboratories SI2493/57/34/15/04 - Manual (Page 301)

AN93
Rev. 1.3 301
}
// This is the main ISR handler loop: stay in it until all interrupts are cleared
while ( RXFInterrupt || TXEInterrupt || TimerInterrupt || U70Interrupt )
{
// ***RXF INTERRUPT***
// Separate RXF interrupt from timer interrupt to reduce the number of HIR1 reads.
if ( RXFInterrupt )
{
// MODULUS_MASK is BUFFERSIZE - 1
while ( ( rxBufferSize < MODULUS_MASK ) && ( BytesReceived < 10 ) )
{
readModemByte;
// Set a flag to know that RXF was serviced
rxf_processed = 1;
BytesReceived++;
}
// Clear the RXF interrupt if fewer than 3 bytes were read. If more than 3 bytes
// were read from the FIFO the interrupt will be cleared automatically.
if (BytesReceived < 3)
{
ClearRXF; // Clear RXF since we didn't empty the FIFO
control_update = 1;
}
}
// ***TIMER INTERRUPT***
// If there wasn't an RXF interrupt, but the receive FIFO isn't empty,
// the interrupt may have been caused by the receive timer interrupt.
// Note: If the host cannot empty its queue fast enough to keep up with the
// modem or if it is going to have a long period of time (>:U6F setting) where
// there won't be room in the FIFO, it would be better to completely disable
// the interrupt until the host has made room for more data. The timer interrupt
// can only be cleared by reading a byte from the FIFO; if there is no room
// in the FIFO, the interrupt will not be cleared. Alternatively, the routine
// could read a byte to clear the interrupt and then discard the data.
// MODULUS_MASK is BUFFERSIZE - 1
while ( TimerInterrupt && ( rxBufferSize < MODULUS_MASK ) )
{
// Read a byte
readModemByte;
BytesReceived++;
// Check the status to see if the FIFO is empty
ReadModemStatus;
}
// ***U70 INTERRUPT***
// Check for a "software" interrupt. "software" refers to any of the interrupts
// described in U70 in the modem datasheet. Only do this if the
// software interrupt is not masked. This is the reason for the bit shift.
if ( U70Interrupt )
{
// Mask the interrupt so that it doesn't cause another interrupt
// until the host software clears it with AT:I and tells us to
// turn it back on
ClearINTM;
control_update = 1;