A n 9 3 – Silicon Laboratories SI2493/57/34/15/04 User Manual
Page 14
A N 9 3
14
Rev. 1.3
2.1.4.1. Reset Strapping Options for TSSOP-24 with UART-Interface
UART-interface options for the 24-pin TSSOP package are shown in Table 6 below.
2.1.4.2. Reset Strapping Options for TSSOP-24 with Parallel-Interface
Parallel-interface options for the 24-pin TSSOP package appear in Table 7 below. The EEPROM and autobaud
options are not available when the parallel interface is selected.
Table 6. TSSOP-24 UART-Interface Options
Mode
Reset-Strap Pins
Input Clock
Autobaud
Disabled?
Three-Wire
EEPROM
Interface?
Pin 4
FSYNC
Pin 11, CTS
Pin 15, AOUT
Pin 16, INT
Pin 17
RI
Pin 18
SDI/EESD
Pin 23
DCD
32 kHz
No
No
1
1
0
1
X
Yes
0
1
0
1
X
Yes
No
1
1
0
0
X
Yes
0
1
0
0
X
4.9152 MHz
No
No
1
1
1
1
1
Yes
0
1
1
1
1
Yes
No
1
1
1
0
1
Yes
0
1
1
0
1
27 MHz
No
No
1
1
1
1
0
Yes
0
1
1
1
0
Yes
No
1
1
1
0
0
Yes
0
1
1
0
0
Table 7. TSSOP-24 Parallel-Interface Options
Mode
Reset-Strap Pins
Input Clock
Pin 9, RD
Pin 10, WR
Pin 11
SCLK
Pin 15
INT
27 MHz
1
0
0
4.9152 MHz
1
1
0