4 digital interfaces, 1 rs-422 interface – Comtech EF Data SDM-100A User Manual
Page 130

Theory of Operation
SDM-100A Satellite Modem
4–14
Rev.
0
4.4 Digital Interfaces
The modem interface module is a daughter card that plugs onto the demodulator board. It 
provides the interface for terrestrial data and overhead signals, and provides the fault 
reporting output of the modem. 
 
RS-422/449, V.35, RS-232-C, and ASYNC interfaces are available for input and output 
of terrestrial data. 
 
Both baseband and interface loopbacks are provided. 
 
Terrestrial data rates from 19.2 to 128 kbit/s are supported. 
4.4.1 RS-422 Interface
The RS-422 digital interface provides level translation, buffering, and termination 
between the internal modem signals and the interface connector on the rear panel. 
Electrical characteristics of the RS-422 interface signals are defined in EIA STD RS-422, 
and details of the mechanical interface are found in EIA STD RS-449. For the electrical 
and mechanical specifications, refer to Sections 4.4.1.1 and 4.4.1.2. 
 
Refer to Figure 4-6 for a functional diagram of the interface. 
 
The RS-422 interface provides a Send Timing (ST) clock signal at the modem data rate. 
 
• In the INTERNAL clock mode, the data to be transmitted, Send Data (SD), must
be synchronized to ST.
 
• In the EXTERNAL clock mode, the clock is accepted on the Terminal Timing 
(TT) input to clock-in the data to be transmitted.
 
In either case, the phase relationship between the clock and data is not important as long 
as it meets the jitter specifications of RS-422/449. This is because a clock phase 
correction circuit is provided, which shifts the clock away from the data transition times. 
The clock phasing is jumper selectable at JP1. Refer to Table 4-1 for jumper settings. 
 
• The AUTO setting is used when there is no jitter on the clock source.
 
• The NORMAL setting is used when standard specifications on clock and data 
relationships exist.
 
• The INVERT mode is used when the incoming clock is inverted from the 
standard clock and data relationship.
