Altera 100G Development Kit, Stratix V GX Edition - Manual (Page 24)

2–16 Chapter 2: Board Components
MAX II CPLD EPM2210 System Controller
100G Development Kit, Stratix V GX Edition August 2012 Altera Corporation
Reference Manual
J15 SI5338_PLL_SCL 2.5-V AT21 Si5338 serial two-wire clock for transceiver PLL
J17 SI5338_PLL_SDA 2.5-V AJ19 Si5338 serial two-wire data for transceiver PLL
G18 STATUSN_LED 2.5-V — Status indicator for programming the FPGA
E15 TSENSE_SMB_CLK 2.5-V — Temperature sense clock
C16 TSENSE_SMB_DATA 2.5-V — Temperature sense data
J13 USB_CLK 1.5-V AP10 On-board USB-Blaster II clock
V2 USB_CFG0 1.5-V BC17 On-board USB-Blaster II data
R5 USB_CFG1 1.5-V BA19 On-board USB-Blaster II data
U3 USB_CFG2 1.5-V BB23 On-board USB-Blaster II data
P6 USB_CFG3 1.5-V AT26 On-board USB-Blaster II data
T4 USB_CFG4 1.5-V BB24 On-board USB-Blaster II data
R6 USB_CFG5 1.5-V AT17 On-board USB-Blaster II data
U4 USB_CFG6 1.5-V BD19 On-board USB-Blaster II data
T6 USB_CFG7 1.5-V AN23 On-board USB-Blaster II data
N3 USER1_POF 2.5-V —
LED to Indicate which user .pof file is loaded into the FPGA N5 USER2_POF 2.5-V —
N2 USER3_POF 2.5-V —
E16 USER_DIPSW0 2.5-V — User DIP switch
F14 USER_DIPSW1 2.5-V — User DIP switch
D18 USER_DIPSW2 2.5-V — User DIP switch
F13 USER_DIPSW3 2.5-V — User DIP switch
E17 USER_DIPSW4 2.5-V — User DIP switch
G15 USER_DIPSW5 2.5-V — User DIP switch
E18 USER_DIPSW6 2.5-V — User DIP switch
G14 USER_DIPSW7 2.5-V — User DIP switch
C10 USER_LED0 2.5-V — User LED
A11 USER_LED1 2.5-V — User LED
C9 USER_LED2 2.5-V — User LED
B10 USER_LED3 2.5-V — User LED
E14 USER_PB0 2.5-V — User push button
D17 USER_PB1 2.5-V — User push button
F15 USER_PB2 2.5-V — User push button
F16 USER_PB3 2.5-V — User push button
Table 2–5. MAX II CPLD EPM2210 System Controller Device Pin-Out (Part 5 of 5)
Board
Reference
(U59)
Schematic Signal
Name
I/O
Standard
Stratix V GX
Device Pin
Number
Pin Description