Altera Mentor Verification IP Altera Edition AMBA AXI4-Stream - Manual (Page 70)

Mentor Verification IP AE AMBA AXI4-Stream User Guide, V10.3 70
SystemVerilog Tutorials
Verifying a Slave DUT
April 2014
Example 6-3. Master Transfer Execution
// 10 x packet at transfer level with
// Number of transfer = i % 10. Values : 1, 2 .. 10
// id = i % 15. Values 0, 1, 2 .. 14
// dest = i %20. Values 0, 1, 2 .. 19
for(int i = 0; i < 10; ++i)
begin
transfer_count = (i % 10) + 1;
trans = bfm.create_master_transaction(transfer_count);
trans.set_id = (i % 15);
trans.set_dest = (i % 20);
for(int j = 0; j < transfer_count; j= j + byte_count)
begin
for(int k = j; k < byte_count; ++k)
begin
trans.set_data(k, k);
if(((i + j)% 5) == 0)
begin
trans.set_byte_type(AXI4STREAM_NULL_BYTE, k);
end
else if(((i + j)% 5) == 1)
begin
trans.set_byte_type(AXI4STREAM_POS_BYTE, k);
end
else
begin
trans.set_byte_type(AXI4STREAM_DATA_BYTE, k);
end
end
bfm.execute_transfer(trans, j / byte_count, last);
end
end