Handshake delay, Tvalid signal delay transaction field, Tready signal delay transaction field – Altera Mentor Verification IP Altera Edition AMBA AXI4-Stream User Manual
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SystemVerilog API Overview
Operational Transaction Fields
Mentor Verification IP AE AMBA AXI4-Stream User Guide, V10.3
29
April 2014
shows a master BFM test program creating a transaction by calling the
task. Before executing the transaction, the operation_mode task is
changed to nonblocking.
Example 2-11. Master Test Program operation_mode() Task
// Define a variable trans of type axi4stream_transaction to hold the
// master transaction record.
axi4stream_transaction trans;
// Create a master transaction to create a transaction record
trans = bfm.create_master_transaction(1);
// Change the operation_mode to be nonblocking in the transaction record
trans.operation_mode(AXI4STREAM_TRANSACTION_NON_BLOCKING);
Handshake Delay
You can configure the TVALID and TREADY handshake signals to insert a delay before their
assertion.
TVALID Signal Delay Transaction Field
contains a valid_delay transaction field to configure the delay of the
TVALID signal. The setting of the valid_delay transaction field is performed in the master
BFM test program by calling the set_valid_delay() task.
TREADY Signal Delay Transaction Field
contains a ready_delay transaction field to configure the delay of the
TREADY signal. The setting of the ready_delay transaction field is performed in the slave
BFM test program by calling the local ready_delay() task.
shows the slave BFM test program implementing a ready_delay() task that
inserts a specified delay before the assertion of the TREADY signal.
Example 2-12. Slave Test Program ready_delay() Task
// Task : ready_delay
// This is used to set ready delay to extend the transfer
task ready_delay();
// Making TREADY '0'. This will consume one cycle.
bfm.execute_stream_ready(0);
// Two clock cycle wait. In total 3 clock wait.
repeat(2) bfm.wait_on(AXI4STREAM_CLOCK_POSEDGE);
// Making TREADY '1'.
bfm.execute_stream_ready(1);
endtask