Altera Mentor Verification IP Altera Edition AMBA AXI4-Stream - Manual (Page 201)

Getting Started with Qsys and the BFMs
Setting Up Simulation from the Windows GUI
Mentor Verification IP AE AMBA AXI4-Stream User Guide, V10.3 201
April 2014
Cadence IES Example Script Processing
The example-ius.sh script described below is contained in the installed Mentor VIP AE
directory location axi4stream/qsys-examples/ex1_back_to_back_sv.
The Mentor VIP AE BFMs for AXI4-Stream are compiled. The ncsim_setup.sh simulation
script is generated by Qsys, along with the simulation model files.
#!/bin/sh
# Usage: [32|64]
# 32 bit mode is run unless 64 is passed in as the first argument.
MENTOR_VIP_AE=${MENTOR_VIP_AE:-$QUARTUS_ROOTDIR/../ip/ \
altera/mentor_vip_ae}
if [ "$1" == "64" ]
then
export QUESTA_MVC_GCC_LIB=$MENTOR_VIP_AE/common/ \
questa_mvc_core/linux_x86_64_gcc-4.4_ius
export INCA_64BIT=1
else
export QUESTA_MVC_GCC_LIB=$MENTOR_VIP_AE/common/ \
questa_mvc_core/linux_gcc-4.4_ius
fi
export LD_LIBRARY_PATH=$QUESTA_MVC_GCC_LIB:$LD_LIBRARY_PATH
cd simulation/cadence
# Run once, just to execute the 'mkdir' for the libraries.
source ncsim_setup.sh SKIP_DEV_COM=1 SKIP_COM=1 SKIP_ELAB=1 SKIP_SIM=1
# Compile VIP
ncvlog -sv \
"$MENTOR_VIP_AE/common/questa_mvc_svapi.svh" \
"$MENTOR_VIP_AE/axi4stream/bfm/mgc_common_axi4stream.sv" \
"$MENTOR_VIP_AE/axi4stream/bfm/mgc_axi4stream_monitor.sv" \
"$MENTOR_VIP_AE/axi4stream/bfm/mgc_axi4stream_inline_monitor.sv" \
"$MENTOR_VIP_AE/axi4stream/bfm/mgc_axi4stream_master.sv" \
"$MENTOR_VIP_AE/axi4stream/bfm/mgc_axi4stream_slave.sv"
The three example test programs are compiled:
# Compile the test program
ncvlog -sv ../../master_test_program.sv
ncvlog -sv ../../monitor_test_program.sv
ncvlog -sv ../../slave_test_program.sv
The example top-level file is compiled:
# Compile the top
ncvlog -sv ../../top.sv
Elaboration and simulation starts with the ncsim_setup.sh command. The Cadence IES
simulator requires the SystemVerilog library path -sv_lib to be passed to the simulator.