Altera Mentor Verification IP Altera Edition AMBA AXI4-Stream - Manual (Page 189)

Mentor Verification IP AE AMBA AXI4-Stream User Guide, V10.3 189
April 2014
Chapter 12
Getting Started with Qsys and the BFMs
Note
A license is required to access the Mentor Graphics VIP AE bus functional models and
inline monitor. See
Mentor VIP AE License Requirements for details.
This example shows you how to use the Qsys tool in Quartus II software to create a top-level
design environment. You will be using the ex1_back_to_back_sv, a SystemVerilog example
from the $QUARTUS_ROOTDIR/../ip/altera/mentor_vip_ae/axi4stream/qsys-examples
directory in the Altera Complete Design Suite (ACDS) installation.
Do the following tasks to set up the design environment:
1. Create a work directory.
2. Copy the example to the work directory.
3. Invoke Qsys from the Quartus II software Tools menu.
4. Generate a top-level netlist.
5. Run the simulation by referencing the README text file and command scripts for your
simulation environment.
Setting Up a Simulation from a UNIX Platform
The following steps outline how to set up the simulation environment from a UNIX platform.
1. Create a work directory into which you copy the example directory qsys-examples,
which contains the directory ex1_back_to_back_sv from the Installation.
a. Using the mkdir command, create the work directory into which you will copy the
qsys-examples directory.
mkdir axi4stream-qsys-example
b. Using the cp command, copy the qsys-examples directory from the Installation
directory into your work directory.
cp -r $QUARTUS_ROOTDIR/../ip/altera/mentor_vip_ae/axi4stream/\
qsys-examples/* axi4stream-qsys-example/