Altera Mentor Verification IP Altera Edition AMBA AXI4-Stream - Manual (Page 17)

Mentor Verification IP AE AMBA AXI4-Stream User Guide, V10.3 17
April 2014
Chapter 1
Mentor VIP Altera Edition
The Mentor VIP AE provides bus functional models (BFMs) to simulate the behavior and to
facilitate the verification of the IP. The Mentor VIP AE includes the following interfaces:
•
AXI3 with master, slave, and inline monitor BFMs
•
AXI4 with master, slave, and inline monitor BFMs
•
AXI4-Lite with master, slave, and inline monitor BFMs
•
AXI4-Stream with master, slave, and inline monitor BFMs
This user guide covers the AXI4-Stream BFMs only. Refer to the Mentor Verification IP Altera
Edition AXI3/AXI4 User Guide for details of the AXI3 and AXI4 BFMs, and the Mentor
Verification IP Altera Edition AXI4-Lite User Guide for details of the AXI4-Lite BFMs.
Advantages of Using BFMs and Monitors
Using the Mentor VIP AE has the following advantages:
•
Accelerates the verification process by providing key verification test bench
components
•
Provides BFM components that implement the AMBA 4 AXI4-Stream Protocol
Specification, which serves as a reference for the protocol
•
Provides a full suite of configurable assertion checking within each BFM
Implementation of BFMs
The Mentor VIP AE BFMs, master, slave, and inline monitor components are implemented in
SystemVerilog. Also included are wrapper components so that you can use the BFMs in VHDL
verification environments with simulators that support mixed-language simulation.
The Mentor VIP AE provides a set of APIs for each BFM that you can use to construct,
instantiate, control, and query signals in all BFM components. Your test programs must use
only these public access methods and events to communicate with each BFM. To ensure
support in current and future releases, your test programs must use the standard set of APIs to
interface with the BFMs. Nonstandard APIs and user-generated interfaces may not be supported
in future releases.