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Clock errors, Network sample rate – Aviom 6416dio User Manual

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External clock sources on the 6416dio Digital I/O Module can include:

• Word Clock ‑ via the dedicated BNC Word Clock jack
• AES3 (AES/EBU) ‑ from AES3 digital stream 1/2

Clock Errors

If a clock error occurs, the Clock Master LED will blink indicating that an error

has occurred. Common causes for a clock error include:

Attempting to change the sample rate on an analog device

other than the Clock Master in an all‑analog network
Attempting to change the clock source when the network

is password protected
Removing or changing external clock sources on a digital

I/O module
Incorrect configuration of an external clock source on a

digital I/O module

Network Sample Rate

When an analog device is the Control Master, the Control Master is

automatically designated as the Clock Master. It will remain the Clock Master

until a different analog module is made the Control Master or until a digital

module such as the 6416dio is added to the network and requests to be the

Clock Master.

The Clock Master LED will light automatically on the Control Master when

that module is powered on. (Only a digital I/O module can be the source of

the network’s master clock without being the Control Master.)

The system’s internal master clock is derived from the sample rate currently

in use. The sample rate also affects the total number of available A‑Net Slots

available for use in the network.

The Sample Rate section of an I/O module’s front‑panel interface includes a

group of LED indicators for displaying the current network sample rate. One

LED will be lit at all times.