Cirrus Logic CDB8422 - Manual (Page 9)

DS692DB2 9
CDB8422
2.2.3 PCM In to S/PDIF and PCM Out
The CS8422’s serial input port and SRC output performance can be tested by loading the “PCM In to
SPDIF and PCM Out” quick setup file provided with the software package. The script configures the dig-
ital clock and data signal routing on the board as shown in
Figure 4 .
PCM audio input is provided by the PCM input header J22. The jumper position on J23 may be changed
to use the MCLK signal from J22 for the CS8422’s XTI signal. The script configures the CS8422’s internal
circuitry to send the input audio data through its SRC to serial output port 1. This data is presented as
PCM audio at header J24 and S/PDIF audio at J27 (coaxial) and J28 (optical). The input data is also
passed through (SRC is bypassed) to serial output port 2. This data is presented as PCM audio at header
J25. Refer to
Section 2.3 for details on software configuration.
Figure 4. PCM In to S/PDIF and PCM Out
CS8406
S/PDIF Tx
(SLAVE)
Buffer Buffer
Header
J24
Buffer
Header
J25
(MASTER)
(MASTER)
OSCLK1
OLRCK1
SDOUT1
OSCLK2
OLRCK2
SDOUT2
ISCLK
ILRCK
SDIN
OSCLK2
OLRCK2
SDOUT2
OSCLK1
OLRCK1
SDOUT1
Optical
S/PDIF
Out
J28
AND
J27
J31
Coaxial
S/PDIF
Out
S/PDIF
OUT
RMCK
OMCK
MCLK OUT
MCLK OUT
CS8422
J23
XTI
Y1
ISCLK
ILRCK
SDIN
Buffer
(SLAVE)
PCM In
MCLK
ISCLK
ILRCK
Header
J22
SDIN
PCM Out
through SRC
PCM Out
no SRC