System overview, 1 power, 2 grounding and power supply decoupling – Cirrus Logic CDB8422 User Manual
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DS692DB2
CDB8422
1. SYSTEM OVERVIEW
The CDB8422 platform provides S/PDIF and AES3/EBU digital interfaces to the CS8422 and allows for external
DSP and I²C
®
or SPI
TM
control port interconnects. On-board voltage regulators are provided so that a single external
power supply of +5 V can be used to provide power for the CDB8422. Optionally, the evaluation board may be pow-
ered from a USB connection, which also serves as an interface to a PC. The CDB8422 is configured in software
mode using Cirrus Logic’s Windows-compatible FlexGUI software to read/write to device registers. In hardware
mode, the evaluation board is configured using several DIP switches.
This section describes the various components on the CDB8422 and how they are used. The two following sections
(
and
) provide details on operating the CDB8422 in software and hardware mode, respectively.
Both sections begin with a simplified quick connect guide provided for user convenience which can be used to set
up the board quickly with the CS8422 in its startup default configuration. Next, descriptions are given for several
useful configuration options in which the board can be used. Then, complete configuration details for each mode
are described.
, and
provide a description of all stake headers, connectors, and LEDs
on the board, including the default factory settings for all jumpers. The CDB8422 schematic and layout set is shown
in
through
1.1
Power
Power and ground is supplied to the evaluation board via binding posts J2 and J3 (respectively) or the USB
connection J37. Jumper J20 allows the user to select the power source (see
for details). The volt-
age connected to the binding posts should be +5 V. An on-board voltage regulator provides +3.3 V for the
CS8422’s VA, VL, and V_REG supplies. All voltage inputs are referenced to ground using the black binding
post J3.
1.2
Grounding and Power Supply Decoupling
The CDB8422 demonstrates the optimal power supply and grounding arrangements for the CS8422.
provides an overview of the connections to the CS8422.
shows the bottom layout. Power supply decoupling ca-
pacitors are located as close as possible to the CS8422. Extensive use of ground plane fill helps reduce
radiated noise.
1.3
FPGA
The FPGA controls digital signal routing between the CS8422, the CS8406, and the I/O stake headers. It
also provides routing control of the system master clock from an on-board canned oscillator, an on-board
crystal oscillator, and the CS8422. The FPGA configures the CDB8422 in hardware mode and routes serial
control signals from the micro controller to the CS8422 in software mode. The Cirrus FlexGUI software pro-
vides full control of the FPGA’s routing and configuration options, see
, and
for details. A subset of the FPGA’s options are accessible in hardware mode using DIP switches, see
for details.
1.4
CS8422
A complete description of the CS8422 can be found in the CS8422 product data sheet.
When the evaluation board is connected to a PC via the USB connector, the CS8422 is placed in software
mode and is configured using the Cirrus FlexGUI. The device configuration registers are accessible via the
“Register Maps” tab of the Cirrus FlexGUI software. This tab provides low-level control of each bit. For eas-
ier configuration, additional tabs provide high-level control.
provides configuration details.