Cirrus Logic CDB42448 - Manual (Page 6)

CDB42448
6 DS648DB2
Selections are made in the control port of the FPGA, accessible through the “FPGA” tab of
the Cirrus Logic FlexGUI software. Refer to register “DSP Header Control (address 07h)” on
page 24 for configuration settings
The 12-pin, 3 row header, J11, allows the user bidirectional access to the SPI/I
2
C control sig-
nals by simply removing all the shunt jumpers from the “PC” position. The user may then
choose to connect a ribbon cable to the “EXTERNAL” position. A single “GND” row for the
ribbon cable’s ground connection is provided to maintain signal integrity. Two unpopulated
pull-up resistors are also available should the user choose to use the CDB for the I
2
C power
rail.
1.10 Analog Input
RCA connectors supply the CS42448 analog inputs through unity gain, AC-coupled single-
ended to differential circuits. The inputs may also be driven single-ended by shunting the ap-
propriate stake headers labeled “Single In”. A 1 Vrms single-ended signal into the RCA con-
nectors will drive the CS42448 inputs to full scale.
1.11 Analog Outputs
The CS42448 analog outputs may be routed either through a single-pole RC passive filter,
or a differential to single-ended 2-pole active filter.
1.12 Serial Control Port
A graphical user interface is included with the CDB42448 to allow easy manipulation of the
registers in the CS42448 (see the CS42448 data sheet for register descriptions) and FPGA
(see section 5 on page 16 for register descriptions). Connecting a cable to the RS-232 con-
nector (J7) and launching the Cirrus Logic FlexGUI software will enable the CDB42448.
Refer to “Software Mode” on page 7 for a description of the Graphical User Interface (GUI).
1.13 USB Control Port
The USB control port connector (J12) is currently unavailable.