Cirrus Logic CDB42448 - Manual (Page 30)

CDB42448
30 DS648DB2
7. CDB BLOCK DIAGRAM
CS42448
C
S
8
416
S/PD
IF
In
put
y
D
if
ferent
ial to
Sing
le-Ende
d
Ou
tpu
t
y
P
a
s
s
ive Fi
lter
o
n
ea
ch Le
g
y
Sing
le-Ende
d to
D
if
ferent
ial Inp
u
t
Seria
l C
ontr
o
l
Port
FP
GA
C
S
8
406
S/PD
IF
Out
put
DS
P
H
E
AD
E
R
C
S
5
341
Os
c
.
AN
ALOG
I
N
P
U
T
ANA
LO
G O
U
TP
UT
y
Sing
le-Ende
d
In
put
AU
X
ILI
ARY
AN
ALOG
I
N
P
U
T
M
C
LK
D
ivided
C
locks /D
a
ta
Hard
w
a
re
Set
u
p
MC
L
K
B
U
S
ADC/DAC Clo cks & Data
A
DC/
DA
C
Cl
o
c
ks/
Dat
a
Clocks/Data
I 2
C/
SPI Header
Po
wer
Fi
gu
re
8
.
Blo
c
k
Di
a
g
ram
Figur
e 9
on
p
age
31
F
igure 10
on
p
age 32
Figur
e 11
on
pa
ge 3
3
F
igure 11 on page
33
Fig
u
re 14 on
pa
ge 36
Figu
re 16 on pag
e
3
8
Figur
e
1
2
on page
34
Figure
1
8
o
n
page 40
Figure
1
6
o
n
p
age
38
Figu
re 17 on pag
e 39
F
igure
16
on
pa
ge
38