Cirrus Logic CDB42448 - Manual (Page 11)

CDB42448
DS648DB2 11
3.3. Internal Data Routing
The graphical description below shows the internal data routing topology between the CS42448,
CS8416, CS8406 and DSP Header. Refer to registers “CODEC SDINx Control (address 02h)”
on page 17, “CS8406 Control (address 04h)” on page 19 and “DSP Header Control (address
07h)” on page 24 for configuration settings.
CS8416
DSP Header
SDOUT
DSP.DATA_OUT1
DSP.DATA_OUT2
DSP.DATA_OUT3
DSP.DATA_OUT4
CS8406
SDIN
CS42448
SDIN1
SDOUT3
AUX
ADC3
ADC2
ADC1
MUX[2:0]
SDOUT1
SDOUT2
SDOUT3
SDIN2
SDIN3
SDIN4
SDOUT1
SDOUT2
CS8416 SDOUT
SDOUT1
DSP OUT1
TDM Stream
CS8416 SDOUT
DSP OUT2
DSP OUT1
CS8416 SDOUT
DSP OUT3
DSP OUT1
CS8416 SDOUT
DSP OUT4
DSP OUT1
SDOUT2
SDOUT3
SDOUT1
DSP_SDIN1
TDMer
SDIN1_MUX[1:0]
SDIN2_MUX[1:0]
AUX_SDIN CS8416 SDOUT
SDIN3_MUX[1:0]
SDIN4_MUX[1:0]
SDIN1
SDIN2
SDIN3
SDIN4
TDM Stream
DSP_SDIN2
DSP_SDIN3
DATA_MUX[2:0]
ADC1,2,3, AUX
DSPDATA->DAC
Figure 4. Internal Data Routing