Cirrus Logic CS4207 - Manual (Page 142)

142 DS880F4
CS4207
7.3 Analog Outputs
7.3.1 Output Filter
The Cirrus Application Note titled
Design Notes for a 2-Pole Filter with Differential Input, available as
AN48 at www.cirrus.com , discusses the second-order Butterworth filter and differential-to-single-ended
converter that was implemented on the CDB4207 evaluation board. Figure 14 illustrates this implemen-
tation. If only single-ended outputs from the CS4207 are required, the passive output filter shown in
Figure 15 can be used.
7.3.2 Analog Supply Removal
In order to reduce audible artifacts, the analog reference is always powered up, even if the AFG has been
transitioned into D3 state. For maximum power savings during D3, it may be desirable to completely re-
move the analog supplies on the system level. Doing so would cause an uncontrolled discharge of the
internal reference and hence audible artifacts, and must therefore be preceded with a controlled reference
ramp-down, which is initiated by setting the PDREF bit in the
DAC Configuration (CIR = 0003h) register
of the Vendor Processing Widget (Node ID = 11h) .
7.4 Digital Mic Inputs
For each ADC, the data from the digital mic input pin widgets are multiplexed with the data from the analog
line/mic input pin widgets, and only one pin widget can be selected at any given time. Furthermore, the data
pins for the DMIC interface (DMIC_SDA1/2) are multiplexed with the GPIO0/1 pins and default to GPIO. In
order to successfully setup the data path for a digital microphone, the following steps have to be followed:
1. clear the
TX 2 Enable bit in the
S/PDIF RX/TX Interface Control (CIR = 0001h) register of the Vendor
Processing Widget (Node ID = 11h) (only required for DMIC2)
LINEOUTx +
LINEOUTx - -
+
1000 pF
C0G
220

2.26 k
 3300 pF
C0G
698

1.5 k 
4.53 k 
2.05 k

1.05 k

22
F
2200 pF
C0G
6800 pF
C0G
220 pF
CS4207
AGND
Analog
Output
22 F
Figure 14. Differential to Single-Ended Output Filter
LINEOUTx +
4.7 µF
Analog
Output
2700 pF
+
47.5 k 
CS4207
AGND
562 
Figure 15. Passive Single-Ended Output Filter