An368 – Cirrus Logic AN368 User Manual

Page 47

AN368

AN368REV2

When exiting reset, the chip enters startup and the ADC quickly (<5ms) tracks the external temperature to
check if it is below Temp

Wakeup

reference code CODE

Wakeup

before the boost and second stages are powered

up. If this check fails, the chip waits until this condition becomes true before initializing the rest of the system.
For external overtemperature protection, a second low-pass filter with a programmable time constant of two
minutes filters the ADC output and uses it to scale down the internal dim level of the system (and hence I

LED

)

if the temperature exceeds Temp

eOTP

(see Figure 21). The large time constant for this filter ensures that the

dim scaling does not happen spontaneously and is not noticeable (suppress spurious glitches).

For example, the system can be set up such that the I

LED

starts reducing when R

NTC

~ 6.3k

 (assuming a

14k

1% tolorance, series resistor R

), which corresponds to a temperature of 95°C (Temp

eOTP

code is

196) for a 100k

 NTC with a Beta of 4334 (100 kW at 25°C). The I

LED

current is scaled based on the

programmed slope using bits RATE[1:0] in register Config44 at Address 76 until it reaches Temp

Shutdown

. The

CS1630/31 uses this calculated value to scale output current I

LED

, as shown in Figure 21.

Beyond this temperature, the IC shuts down using the mechanism discussed above. Temperature threshold
must be set such that Temp

eOTP

Wakeup

Shutdown

. If the external thermistor for overtemperature

protection and temperature compensation for CCT control is not used, connect the eOTP pin to GND using a
50k

 to 500k resistor to disable the eOTP feature so that the programmed Temp

Wakeup

and Temp

Shutdown

codes are greater than the measured 8-bit code corresponding to the total resistance on the pin.
The ADC output is filtered and then monitored using a digital algorithm that detects eOTP events using the
OTP settings configured in the following steps:

1. The external overtemperature protection feature is enabled by setting bit EEOTP to ‘0’. Bit EEOTP is bit

1 in register Config47 at Address 79.

2. Select when to enable the boost stage on chip power-up by configuring the BOOST_ON bit in register

Config53 at Address 85. To enable boost after a eOTP measurement check for Temp

NTC

> Temp

Wakeup

set bit BOOST_ON to ‘0’. To enable boost after ADC lock without waiting for a eOTP measurement to
finish set bit BOOST_ON to ‘1’.

3. The second filtered output is used to scale down the internal dim level of the system if the temperature

exceeds a programmable 8-bit threshold corresponding to Temp

eOTP

configured using bits eOTP[4:0]

in register Config59 at Address 91. The 8-bit code value CODE

TEMPeOTP

corresponding to temperature

Temp

eOTP

and sets the point at which the eOTP dim with temperature feature is enabled;

Temp

eOTP

< Temp

Wakeup

< Temp

Shutdown

. See Equation 77:

4. An external overtemperature event is not a latched protection. The algorithm continues to track the

temperature in order to clear the fault state once the temperature drops below a temperature code
corresponding to Temp

Wakeup

programmed using bits WAKEUP[3:0] in register Config46 at Address 78.

The wakeup temperature code is configured as an offset from the eOTP temperature code;
Temp

eOTP

< Temp

Wakeup

< Temp

Shutdown

. See Equation 78:

Temperature (°C)

, N

125

50%

100%

eOTP Trips and
Shuts Off Lamp

Figure 21. LED Current vs. Temperature

CODE

TEMPeOTP

eOTP



[4:0] 4





[Eq. 77]

CODE

TEMPWakeup

CODE

TEMPeOTP

WAKEUP



[3:0] 4





[Eq. 78]