IEI Integration NANO-LX v1.00 - Manual (Page 55)

NANO-LX CPU Card
55
PIN DESCRIPTION PIN DESCRIPTION
1 RESET# 2 GND
3 DATA 7 4 DATA 8
5 DATA 6 6 DATA 9
7 DATA 5 8 DATA 10
9 DATA 4 10 DATA 11
11 DATA 3 12 DATA 12
13 DATA 2 14 DATA 13
15 DATA 1 16 DATA 14
17 DATA 0 18 DATA 15
19 SIGNAL GND 20 (KEY)
21 HDD 0 22 GND
23 IO WRITE 24 GND
25 IO READ 26 GND
27 HD READY 28 N/C
29 HDACK 0 30 GND
31 IRQ14 32 N/C
33 ADDR 1 34 N/C
35 ADDR 0 36 ADDR 2
37 HDD SELECT 0 38 HDD SELECT 1
39 IDE ACTIVE# 40 GND
41 VCC 42 VCC
43 GND 44 N/C
Table 3-14: CN13 Connector Pinouts