IEI Integration NANO-LX v1.00 - Manual (Page 28)

28 IEI ® Technology, Corp.
Supports PCI/mini-PCI interfaces
Integrates Fast Ethernet MAC, physical chip, and transceiver onto a
single chip
10Mbps and 100Mbps operation
Supports 10Mbps and 100Mbps N-way auto-negotiation
Supports 25MHz Crystal or 25MHz OSC as the internal clock source
Complies with PC99/PC2001 standards
Supports ACPI power management
Provides PCI bus master data transfer
Provides PCI memory space or I/O space mapped data transfer
Supports PCI clock speed of 16.75MHz-40MHz
Advanced power saving mode
Supports Wake-on-LAN and remote wake-up (AMD Magic Packet ™ , Link
Change, and Microsoft ® Wake-up frame)
Half/Full duplex capability
Supports Full Duplex Flow Control (IEEE 802.3x)
Provides interface to 93C46 EEPROM to store resource configuration and
ID parameters
Provides PCI clock run pin
Provides LED pins for network operation status indication
2.5/3.3V power supply with 5V tolerant I/Os
0.25µm CMOS process
2.7 Drive Interfaces
The NANO-LX can support the following drive interfaces:
2 x SATA drives
1 x IDE device
1 x Compact flash device
1 x FDD
The NANO-LX is compliant to the ATA-6 specification. The IDE interface supports one
channel, that in turn supports two devices that can operate in PIO modes 0 to 4, MDMA
modes 0 to 2, or UDMA modes 0 to 5 (up to 100 MB/s).