IEI Integration NANO-LX v1.00 - Manual (Page 184)

184 IEI ® Technology, Corp.
C.1 I/O Address Map
I/O Address
Range
Description
000-01F DMA Controller
020-021 Interrupt Controller
040-043 System time
060-06F Keyboard Controller
070-07F System CMOS/Real time Clock
080-09F DMA Controller
0A0-0A1 Interrupt Controller
0C0-0DF DMA Controller
0F0-0FF Numeric data processor
1F0-1F7 Primary IDE Channel
2F8-2FF Serial Port 2 (COM2)
378-37F Parallel Printer Port 1 (LPT1)
3B0-3BB Intel(R) Graphics Controller
3C0-3DF Intel(R) Graphics Controller
3F6-3F6 Primary IDE Channel
3F7-3F7 Standard floppy disk controller
3F8-3FF Serial Port 1 (COM1)
Table C-1: I/O Address Map
C.2 1 st MB Memory Address Map
Memory address Description
00000-9FFFF System memory
A0000-BFFFF VGA buffer
F0000-FFFFF System BIOS
1000000- Extend BIOS
Table C-2: 1 st MB Memory Address Map