IEI Integration IEM-9452 - Manual (Page 144)

IEM-9452 ETX Module
Page 128
with each other.
L1 Cache The Level 1 Cache (L1 Cache) is a small memory cache built into the
system processor.
L2 Cache The Level 2 Cache (L2 Cache) is an external processor memory cache.
LCD Liquid crystal display (LCD) is a flat, low-power display device that
consists of two polarizing plates with a liquid crystal panel in between.
LVDS Low-voltage differential signaling (LVDS) is a dual-wire, high-speed
differential electrical signaling system commonly used to connect LCD
displays to a computer.
MAC The Media Access Control (MAC) protocol enables several terminals or
network nodes to communicate in a LAN, or other multipoint networks.
QVGA Quarter Video Graphics Array (QVGA) refers to a display with a
resolution of 320 x 240 pixels.
RAM Random Access Memory (RAM) is volatile memory that loses data when
power is lost. RAM has very fast data transfer rates compared to other
storage like hard drives.
SATA Serial ATA (SATA) is a serial communications bus designed for data
transfers between storage devices and the computer chipsets. The SATA
bus has transfer speeds up to 1.5 Gbps and the SATA II bus has data
transfer speeds of up to 3.0 Gbps.
S.M.A.R.T Self Monitoring Analysis and Reporting Technology (S.M.A.R.T) refers to
automatic status checking technology implemented on hard disk drives.
UART Universal Asynchronous Receiver-transmitter (UART) is responsible for
asynchronous communications on the system and manages the system’s
serial communication (COM) ports.
UHCI The Universal Host Controller Interface (UHCI) specification is a
register-level interface description for USB 1.1 Host Controllers.