Asus KFN5-Q/SAS - Manual (Page 85)

ASUS KFN5-Q Series 4-15
4.4.2 Chipset
The Chipset menu allows you to change the advanced chipset settings.
Select an item then press to display the sub-menu.
Options for NB.
NorthBridge Configuration
SouthBridge/MCP55 Configuration
PCI Express Configuration
Smbios Configuration
Advanced Chipset Settings
WARNING: Setting wrong values in below sections
may cause system to malfunction.
NorthBridge Configuration
The NorthBridge Configuration menu allows you to change the Northbridge
settings.
MTRR Mapping [Continuous]
Sets the method used for programming CPU MTRRs when 4GB or more
memory is installed on the system. When set to Discrete, the BIOS leaves
the PCI hole below the 4GB boundary undescribed. Set to Continuous to
describe the PCI hole as non-cacheable.
Configuration options: [Continuous] [Discrete]
PowerNow [Disabled]
Enables or disables generation of the ACPI_PPC, _PSS, and _PCT objects.
Configuration options: [Disabled] [Enabled]
NorthBridge Chipset Configuration
Memory Configuration
ECC Configuration
IOMMU Option Menu
Power Down Control [Auto]
Alternate VID [Auto]
Memory CLK : 333 MHz
CAS Latency (Tcl) : 5.0
RAS/CAS Delay (Trcd) : 5 CLK
Min Active RAS (Tras) : 15 CLK
Row Precharge Time (Trp) : 5 CLK
RAS/RAS Delay (Trrd) : 3 CLK
Row Cycle (Trc) : 21 CLK
Read to Precharge Time (Trpt) : 2 CLK
Write Recovery Time (Twrt) : 5 CLK
Read Command Delay (Twtr) : 3 CLK
Asynchronous Latency : 6 ns