Rainbow Electronics DS3184 - Manual (Page 4)

Maxim/Dallas Semiconductor Confidential Product Preview: DS3181,2,3,4
Rev 1.5 4 of 13 022304
Figure 1-2 Functional Block Diagram
T
D
E
N
n
TD
ATn
/
T
G
C
LK
n
T
LC
LK
n
TSOFn / TI
OH
Mn
T
O
H
n
T
O
H
G
C
L
K
n
TOH
S
OFn
T
P
O
H
n
T
P
O
H
G
C
LK
T
P
O
H
SOFn
8KREF
I
TMEI
System
Interface
TSCLK
TADR[4:0]
TDATA[31:0]
TPRTY*
TEN*
TPXA
TDXA[4:1]
TSOX
TEOP
TSX
TMOD[1:0]
TERR
TSPA
Tx
FIFO
Tx
PLCP/FRAC
Formatter
Tx Cell
Processor DS3/E3
Transmit
LIU
TXPn DS3 / E3
Transmit
Formatter
B3ZS/
HDB3
Encoder
TXNn
Tx Packet
Processor TDMn
Fr
am
er
D
iagnosti
c
Loo
pback
L
in
e
Fa
cility
L
o
op
ba
ck
System
In
ter
fac
e
Loo
pback
Fr
am
er
Payl
oa
d
Loo
p
back
LLi
n
e Ter
m
inal
Loo
pback
Trail
Trace
Buffer
HDLC FEAC
BERT
RSCLK
RADR[4:0]
RDATA[31:0]
RPRTY*
REN*
RPXA
RDXA[4:1]
RSOX
REOP
RSX
RVAL
RMOD[1:0]
RERR
Rx
FIFO
Rx Packet
Processor
DS3/E3
Receive
LIU
DS3 / E3
Receive
Framer
B3ZS/
HDB3
Decoder
RXPn
Rx
PLCP/FRAC
Framer
Rx Cell
Processor
RXNn
Microprocessor
Interface
IEEE P1149.1
JTAG Test
Access Port
Clock Rate
Adapter
n = port #
CLK
A
CLKB
R
D
A
T
n
R
D
EN
n / RG
C
LK
n
R
S
O
F
n
RL
CLKn
R
P
O
H
n
R
P
O
H
G
C
LK
n
RPO
H
S
O
F
n
8KREFO
R
O
H
n
R
O
H
G
C
L
K
n
RO
HSOF
n
JT
D
O
JT
D
I
JT
C
LK
JT
RST
*
JT
M
S
RE
CU
REF
C
LK
A
LE
C
S
*
R
D
*/
D
S
*
WR
*/
R
/W
*
M
O
T
R
S
T
*
INT
*
P
IO
A
n
PIOBn D
[15
:0
]
A
[9:0
]
2 APPLICATIONS
• Access Concentrators
• Multi-Service Access Platforms
• ATM and Frame Relay Equipment
• Routers and Switches
• SONET/SDH ADM
• SONET/SDH Muxes
• PBXs
• Digital Cross Connect
• PDH Multiplexer/Demultiplexer
• Test Equipment
The following figures, Figure 2-1 and Figure 2-2, show applications for DS3184 as four port
unchannelized ATM and packet T3/E3 line cards, respectively.