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Connecting the bits clock – Patton electronic 3196RC User Manual

Page 32

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Cable installation

32

Model 3196RC T-DAC User Manual

2 • Hardware installation

Note

The 2-wire iDSL modem lines are polarity insensitive so you only
need to match the correct pair of wires to the correct pair of terminals
on the punch-down block.

3. Select and attach the appropriate twisted pair from each remote (CPE) iDSL modem on punch-down

blocks for connection to the chosen iDSL port in the 3196RC.

Connecting the BITS clock

The ForeFront system can accept and synchronize with an external reference clock signal provided by a build-
ing integrated timing system (BITS) residing at the installation site. The BITS clock signal is specified by ITU-
T Recommendation G.703 as a balanced, polarity-insensitive, 64kbps signal with a maximum voltage
of 2.2 Vpp.

Port 12

12
37

Orange/Black
Black/Orange

Port 13

13
38

Green/Black
Black/Green

Port 14

14
39

Brown/Black
Black/Brown

Port 15

15
40

Slate/Black
Black/Slate

Port 16

16
41

Blue/Yellow
Yellow/Blue

17
42

Orange/Yellow
Yellow/Orange

18
43

Green/Yellow
Yellow/Green

19
44

Brown/Yellow
Yellow/Brown

20
45

Slate/Yellow
Yellow/Slate

21
46

Blue/Violet
Violet/Blue

22
47

Orange/Violet
Violet/Orange

23
48

Green/Violet
Violet/Green

24
49

Brown/Violet
Violet/Brown

25
50

Slate/Violet
Violet/Slate

Table 5. Band Marked Color Code (Continued)

DSL Port

50 Pin Positions

Wire Color Code