Sundance Spas ST201 User Manual
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Sundance Technology
ST201
PRELIMINARY draft 2
TXDMABURSTTHRESH
Class....................I/O Registers, DMA
Base Address ......IoBaseAddress register value
Address Offset .....0x08
Access Mode .......Read/Write
Width ...................8 bits
TxDMABurstThresh determines the threshold for when the ST201 makes TxDMA bus master requests,
based upon the available space in the TxFIFO. The value in TxDMABurstThresh represents free space in
the TxFIFO in multiples of 32 bytes. When the free space exceeds the threshold, the ST201 may make a
TxDMA request. However, if the free space exceeds the current TxDMAFragLen, ST201 will make TxDMA
bus request regardless of whether the free space exceeds the TxDMABurstThresh or not. TxDMABurst-
Thresh may be overridden by the TxDMAUrgentThresh mechanism. See the PCI Bus Master Operation
section for information about the relationship between TxDMABurstThresh and TxDMAUrgentThresh. A
value of zero is invalid. TxDMABurstThresh defaults to 8, a threshold of 256 bytes.
BIT
BIT NAME
BIT DESCRIPTION
4..0
TxDMABurst-
Thresh
The number of 32-byte words which must be available in the TxFIFO
prior to assertion of a TxDMA Burst Request.
7..5
Unused
These bits are ignored.