Sundance Spas ST201 - Manual (Page 115)

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Sundance Technology ST201 PRELIMINARY draft 2
IOBASEADDRESS
Class....................PCI Configuration Registers, Configuration
Base Address ......PCI device configuration header start
Address Offset .....0x10
Access Mode .......Read/Write
Width ...................32 bits
The host uses this register to define the I/O base address for the adapter. PCI system requires that I/O
base addresses be set as if the system used 32-bit I/O addressing. The upper 25 bits of the register are
read/write accessible, indicating that the ST201 requires 128 bytes of I/O space in the system I/O map.
BIT BIT NAME BIT DESCRIPTION
0 IoBaseAddrInd A value of 1 indicates this register holds the I/O base address for the
ST201.
6..1 Reserved Reserved for future use. Should be set to 0.
31..7 IoBaseAddress The system programs the I/O base address into this field. Since the
ST201 uses 128 bytes of I/O space, 25 bits are required to completely
specify the I/O base address.