Sundance Spas ST201 User Manual
Page 17
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17
Sundance Technology
ST201
PRELIMINARY draft 2
received and transferred by RxDMA, a RxDMA-
Complete interrupt will be generated for each
frame.
The host system must create a RxDMAList and the
associated buffers prior to reception of a frame.
One approach calls for the host system to allocate
a block of full size (i.e. large enough to hold a max-
imum size Ethernet frame of 1518 bytes) frame
buffers in system data space and create RFDs that
point to them. Another approach is for the host sys-
tem to request the buffers from the protocol ahead
of time.
After reset, the ST201 receive function is disabled.
Once the RxEnable bit is set, frames will be
received according to the matching mode pro-
grammed in ReceiveMode register. Reception can
be disabled by setting the RxDisable bit. If set
while a frame is being received, RxDisable only
takes effect after the active frame reception is fin-
ished. The receive function begins with the RxDMA
Logic in the idle state. The RxDMA Logic will begin
processing a RxDMAList as soon as a non-zero
address is written into the RxDMAListPtr register.
The host system creates a RFD with the addresses
and lengths of the buffers to be used and programs
the RxDMAListPtr register to point to the head of
the list. The host system must program a zero into
the RxDMANextPtr of the last RFD to indicate the
end of the RxDMAList. When a frame is received in
the RxFIFO, the ST201 fetches the fragment
address and fragment length values one by one
from the current RFD, and writes these values into
internal registers which control data transfer opera-
tions. Similar to TxDMA, the RxDMA Logic can be
controlled by the RxDMAHalt and RxDMAResume
bits. The host system should set the RxDMAHalt
bit before modifying the list pointers in the RxD-
MAList. The RxDMA Logic will return to the idle
state when the RxDMAListPtr register is zero.
For RxDMA lists configured as a ring, the host sys-
tem should clear the RxDMAComplete bit within
the ReceiveFrameStatus field of the RFD from
which the host system has finished reading data. If
RxDMAPollPeriod is zero the host system should
also issue a RxDMAResume in case the ST201
has halted due to detection of a set RxDMACom-
plete bit within the ReceiveFrameStatus field of the
next RFD in the ring. If the ST201 fetches a RxD-
MAListPtr for a RFD that has already been used (a
RFD in which the RxDMAComplete bit is set in
ReceiveFrameStatus), the RxDMA Logic will either
assert an implicit RxDMAHalt or, if the RxDMAPoll-
Period register is set to a non-zero value, the
RxDMA Logic will automatically recheck RxDMA-
Complete periodically until it is cleared.
The operation for adding RFDs into the RxDMAList
starts with halting the RxDMA Logic by setting the
RxDMAHalt bit within the DMACtrl register. The
host system then updates RxDMANextPtr in the
last RFD in the RxDMAList to point at the new
RFD. The host system will also need to read the
RxDMAListPtr, and if it was zero, write the address
of the just added RFD into RxDMAListPtr and set
the RxDMAResume bit within the DMACtrl register
to re-start the RxDMA Logic.
The ST201 can be configured to generate a RxD-
MAComplete interrupt when RxDMA completes a
frame reception. In response to a RxDMAComplete
interrupt, the host system must examine the
ReceiveFrameStatus field in the RFD of the
received frame to determine the size of the frame
and whether there were any errors. The host sys-
tem must then copy the frame out of the receive
buffers, if needed.
In general, when the host system enters its inter-
rupt service routine, multiple frames may have
been transferred by RxDMA. The host system can
read RxDMAListPtr to determine which RFDs in
the list have been used. The host system begins at
the head of the RFD list, and traverses the list until
it reaches the RFD whose address matches RxD-
MAListPtr. However, since I/O operations are
costly, it is more efficient to use the RxDMACom-
plete bit in each RFD to determine which frames
have been transferred by RxDMA.
RFD 1
RFD 2
HOST SYSTEM MEMORY
RFD n
FIGURE 5: RxDMA List Shown in Ring
Configuration