Sundance Spas ST201 - Manual (Page 26)

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Sundance Technology ST201 PRELIMINARY draft 2
host system then returns to the operating sys-
tem an indication of readiness to be powered
down (making sure to leave the ReceiveMode
register set to receive the appropriate Wake/
Magic packets). The operating system eventu-
ally writes to the PowerMgmtCtrl register, plac-
ing the ST201 in one of the power down states,
and enabling PMEN assertion, while the
ST201 monitors for the occurrence of enabled
wake events.
WAKE EVENT
When a desired wake event occurs, the ST201
sets the appropriate event bit in the WakeEvent
register, sets the PmeStatus bit in the PowerMg-
mtCtrl register, and asserts the PMEN pin.
The host system responds to PMEN by scanning
the power management configuration registers of
all devices, looking for the device which asserted
PMEN. If the device with the ST201 signaled wake,
the system will find PmeStatus set in ST201’s Pow-
erMgmtCtrl register. The operating system then
clears the PmeEn bit in the PowerMgmtCtrl regis-
ter causing PMEN to be de-asserted.
The operating system raises the power state (prob-
ably to D0) by writing to the PowerState bits in the
PowerMgmtCtrl register. If the ST201 was previ-
ously in the D3 state, PCI configuration is lost and
must be restored by the operating system.
The host system must set TxReset to clear any
wake patterns out of the TxFIFO (if this is not done,
the patterns will be treated as frames and transmit-
ted once the transmitter is enabled).
The host system reads the WakeEvent register to
determine the wake event, and if requested,
passes it back to the operating system. The host
system restores any volatile state that was saved
in the power down sequence. The host system re-
enables interrupts by programming IntEnable. The
host system restores the RxDMAList (and any
other data structures required for operation). Any
wake packets in the RxFIFO are transferred by
RxDMA and passed to the operating system.