Sundance Spas ST201 - Manual (Page 15)

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Sundance Technology ST201 PRELIMINARY draft 2
The TxDMAListPtr I/O register within the ST201
contains the physical address that points to the
head of the TxDMAList. TxDMAListPtr must point
to addresses which are on 8-byte boundaries. A
value of zero in the TxDMAListPtr register implies
there are no pending TFD’s for the ST201 to pro-
cess.
Generally, it is desirable for the host system to
queue multiple frames. Multiple TFD’s are linked
together in a list by pointing the TxDMANextPtr of
each TFD at the next TFD. The last TFD in the
linked list should have a value of zero for it’s TxD-
MANextPtr.
It is required that the host halt the TxDMA Logic by
setting the TxDMAHalt bit before modifying TxD-
MAList or writing a new value to TxDMAListPtr
(unless it is already zero). When the host has fin-
ished manipulating the list, it sets the TxDMARe-
sume bit.
The TxDMA process returns to the idle state upon
detection of a zero value for TxDMANextPtr. When
a new frame is available to transfer, the host sys-
tem must write the address of the new TFD into the
TxDMANextPtr memory location of the last TFD,
and either set the TxEnable bit, or utilize the
ST201’s automatic polling capability. Using auto-
matic polling, the ST201 will monitor the TxDMAN-
extPtr memory location until a non-zero value is
found at that location in system memory. The TxD-
MAPollPeriod register controls this polling function,
which is enabled when TxDMAPollPeriod contains
a non-zero value. The value written to TxDMAPoll-
Period determines the TxDMANextPtr polling inter-
val.
The ST201 can be configured to generate TxDMA-
Complete interrupts on a per frame basis by setting
the TxDMAIndicate bit within the TFC field of each
TFD. In response to a TxDMAComplete interrupt,
when data transfer by TxDMA is finished, the host
system acknowledges the interrupt and returns the
frame data buffers to the system. In the case of a
multi-frame TxDMAList, multiple frames may have
been transferred by TxDMA when the host system
enters its interrupt service routine. The host system
can traverse the list of TFD’s, examining the TxD-
MAComplete bit in each TFD to determine which
frames have been transferred by TxDMA.
The ST201 fetches the TFC before frame data
transfer, and again at the end of TxDMA operation
to examine the TxDMAIndicate bit. This allows the
host system to change TxDMAIndicate while data
transfer of the frame is in progress. For instance, a
frame’s TFD might be at the end of the TxDMAList
when it starts TxDMA, so the host system would
probably set TxDMAIndicate to generate an inter-
rupt. However, if during the TxDMA process of this
frame, the host system added a new TFD to the
end of the list, it might clear TxDMAIndicate in the
currently active TFD so that the interrupt is delayed
until the next TFD.
The ST201 has the ability to automatically round
up the length of a transmit frame. This is useful in
some NOS environments in which frame lengths
need to be an even number of words. Frame length
word-alignment is performed based upon the sum
of the fragment lengths specified in a TFD, and the
2-bit WordAlign field in the TFD’s TFC field. Word-
alignment occurs when the frame length implied by
the sum of the fragment lengths is not an even mul-
tiple of the value indicated by WordAlign. The
frame length is rounded up to either a word or
dword boundary, depending upon the value of
WordAlign. Host systems may disable frame length
word-alignment by setting the WordAlign bits in the
TransmitFrameControl to x1.
The MAC will initiate frame transmission (if trans-
mission is enabled) as soon as either the entire
frame is resident in the TxFIFO, or the number of
bytes present in the TxFIFO is greater than the
value in the TxStartThresh register.
As a frame transmits out of the TxFIFO, it is desir-
able to be able to release the FIFO space so that it
may be used for another frame. The value pro-
grammed into TxReleaseThresh determines how
much of a frame must be transmitted before its
FIFO space can be released.
A TxReleaseError occurs when a frame experi-
ences a collision after the frame’s release thresh-
old has been crossed. The ST201 will be unable to
retransmit the frame and the host needs to re-start
the TxDMA transfer. When a transmit error occurs,
a TxComplete interrupt is generated, and the spe-
cific error is indicated by status bits in TxStatus. To
recover from a transmit error, the host system must
re-enable the transmitter and, in the case of an
under run error, reset the transmit logic with TxRe-
set, before subsequent transmissions can occur.
When MaxCollisions or TxStatusOverflow errors
occur, any pending frames in the TxFIFO are pre-
served (except the frame that experienced Max-
Collisions). The frames are held in the TxFIFO due
to the fact that MaxCollisions and TxStatusOver-
flow errors do not require assertion of TxReset.
The preserved frames will be transmitted following
a transmitter re-enable.
Since TxDMA writes into one end of the TxFIFO
and the transmit MAC reads from the other end,
TxDMA and transmit completes (including errors)