beautypg.com

Sundance Spas ST201 User Manual

Page 57

background image

57

Sundance Technology

ST201

PRELIMINARY draft 2

TXSTATUS

Class....................I/O Registers, Control and Status

Base Address ......IoBaseAddress register value

Address Offset .....0x46

Access Mode .......Read (write to advance queue)

Width ...................8 bits

The TxStatus register returns the status of frame transmission or transmission attempts. TxStatus actually
implements a queue of up to 31 transmit status bytes. An I/O write of an arbitrary value to TxStatus will
advance the queue to the next transmit status byte.

BIT

BIT NAME

BIT DESCRIPTION

0

Reserved

Reserved for future use. Should be set to 0.

1

TxReleaseError

Indicates that a transmit release error occurred, meaning that the
frame transmission experienced a collision after the front of the frame
had already been released to the TxFIFO free space. Refer to TxRe-
leaseThresh register for complete description.

2

TxStatusOverflow

When set, indicates that the TxStatus stack is full and as a result the
transmitter has been disabled. Writing TxStatus clears this bit, but the
transmitter must be re-enabled with the TxEnable before transmissions
may resume.

3

MaxCollisions

When set, the frame was not successfully transmitted due to encoun-
tering 16 collisions. TxEnable must be set to recover from this condi-
tion. The frame is discarded from the TxFIFO, so driver should
resubmit the frame for transmission.

4

TxUnderrun

This bit indicates that the frame experienced an under run during the
transmit process because the host was unable to supply the frame
data fast enough to keep up with the network data rate. An under run
will halt the transmitter and the TxFIFO. The TxReset and TxEnable
bits must be set prior to re-starting any frame.

5

Reserved

Reserved for future use. Should be set to 0.

6

TxIndicateReqd

This bit is asserted if the TxIndicate bit was set when the 32-bit Trans-
mitFrameControl was written to the ST201 for the frame.

7

TxComplete

If this bit is cleared, then the remainder of the status bits are undefined.
If the host chooses to poll this register while waiting for a frame trans-
mission to complete, then this bit is used to determine that a frame
transmission attempt has either experienced an error, or has com-
pleted successfully with the TxIndicate bit set in the TransmitFrame-
Control.