Sundance Spas ST201 - Manual (Page 118)

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Sundance Technology ST201 PRELIMINARY draft 2
MEMBASEADDRESS
Class....................PCI Configuration Registers, Configuration
Base Address ......PCI device configuration header start
Address Offset .....0x14
Access Mode .......Read/Write
Width ...................32 bits
The host uses this register to define the memory base address for the adapter registers.
BIT BIT NAME BIT DESCRIPTION
0 MemBaseAddrInd A value of 1 indicates this register is the memory base address.
2..1 MemMapType These are read-only bits, and [2] is hard wired to 0. Bit[1] is loaded
from EEPROM Lower1Meg bit of the ConfigParm. When set to 01,
instructs the host system to map the adapter registers into the lowest 1
megabyte of memory address space. When set to 00, the registers can
be map to anywhere within the 32-bit address space.
6..3 Reserved Reserved for future use. Should be set to 0.
31..7 MemBaseAddress The system programs the memory base address into this field. Since
the adapter registers occupy 128 bytes of I/O space, 25 bits are
required to completely specify the memory base address.