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Register definitions – HP E1459A User Manual

Page 78

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HP E1459A Register Definitions

77

For example, for the HP 75000 Series C Mainframe with an HP E1406
Command Module, VXI A16 address space starts at 1F0000

h

(

h

= HEX). In

the HP E1406 Command Module, the A16 space is divided so modules are
addressed only at locations beginning with C000

h

within A16. Each module

is allocated 64 register addresses (40

h

). The module base address is related

to the logical address set by the logical address switch on the module:

base address (

h

) = (logical address

h

)*40

h

+ C000

h

For the HP E1459A, the factory-set logical address is 144 (90

h

), so to

address the Status/Control register of an HP E1459A using the HP E1406
Command Module:

base address = (90

h

)*(40

h

) + C000

h

> = E400

h

register address = [A16 location]

h

+ [base addr]

h

+ [register offset]

h

register address = 1F0000

h

+ E400

h

+ 04

h

= 1FE404

h

Register Definitions

The following registers can be accessed on the HP E1459A:

ID Register (base + 00

h

)

Device Type Register (base + 02

h

)

Status/Control Register (base + 04

h

)

Edge Interrupt Status Register (base + 06

h

)

Data Available Status Register (base + 08

h

)

Watchdog Timer Control/Status Register (base + 0A

h

)

Command Register of Port 0/2 (base + 10

h

)

Channel Data Register of Port 0/2 (base + 12

h

)

Positive Edge Detect Register of Port 0/2 (base + 14

h

)

Negative Edge Detect Register of Port 0/2 (base + 16

h

)

Positive Mask Register of Port 0/2 (base + 18

h

)

Negative Mask Register of Port 0/2 (base + 1A

h

)

Debounce Clock Control/Status Register of Port 0 and 1/Port 2 and 3

(base + 1E

h

)

Command Register of Port 1/3 (base + 20

h

)

Channel Data Register of Port 1/3 (base + 22

h

)

Positive Edge Detect Register of Port 1/3 (base + 24

h

)

Negative Edge Detect Register of Port 1/3 (base + 26

h

)

Positive Mask Register of Port 1/3 (base + 28

h

)

Negative Mask Register of Port 1/3 (base + 2A

h

)

Debounce Clock Control/Status Register of Port 0 and 1/Port 2 and 3

(base + 2E

h

)

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