Avago Technologies LSI53C180 - Manual (Page 70)

IX-2 Index
E
electrical characteristics 3-7
to
3-19
electrostatic discharge 3-8
enable/disable SCSI transfers 3-6
ESD 3-8
external configuration B-3
external reset circuit 3-12
external terminator B-3
F
filter edges 2-9
free B-3
functional signal grouping 3-4
G
glitches 2-3
H
high voltage differential SCSI 1-7
host B-3
adapter B-3
hysteresis of SCSI receivers 3-15
I
I/O B-3
cycle B-3
identification B-5
initiator B-3
input
capacitance 3-10
I/O pads 3-10
input pads 3-10
low voltage 3-11
voltage 3-8
input clock signals 2-15
input control signals 3-12
input current
function of input voltage 3-15
input timing
double transition 3-18
single transition 3-17
input/output (SIO) 2-10
internal configuration B-3
internal terminator B-3
L
latch-up current 3-8
leading edge filter 2-7
,
2-8
load bus 2-6
logical unit B-3
low (logical level) B-3
LSB B-4
LSI53C180
applications 1-3
features 1-5
server clustering 1-3
Ultra3 SCSI Bus Expander 1-1
LUN B-4
LVD B-4
driver SCSI signals 3-9
receiver 3-10
receiver SCSI signals 3-9
LVD Link 1-8
benefits 1-7
,
1-8
technology 2-3
transceivers 1-8
,
2-4
M
mandatory B-4
master reset 3-6
message (SMSG) 2-10
MHz B-4
microsecond B-4
migration path 1-8
MSB B-4
MSG B-4
N
nanosecond B-4
negated B-4
negation B-4
O
operating conditions 3-8
operating free air 3-8
output
control signals 3-12
low voltage 3-11
timing 3-18
output current
function of output voltage 3-16
output timing
double transition 3-19
single transition 3-18
P
parallel function 2-8
,
2-9
parallel protocol request 1-7
parity 2-3
,
2-6
,
B-4
peripheral device B-4
phase B-5
port definition B-5
power
down 2-3
on reset (POR) 2-11
up 2-3
precision
delay control 2-1
,
2-4
priority
definition B-5
protocol
definition B-5
pull-down 2-7
,
2-10
pull-up 2-7
,
2-10
pulse width 2-9
R
RC-type input filters 2-3
receiver