Avago Technologies LSI53C180 - Manual (Page 30)

2-12 Functional Descriptions
for an external chip reset if the power supply meets ramp up
specifications.
2.1.8.2 Warm Swap Enable (WS_ENABLE/)
This input removes the chip from an active bus without disturbing the
current SCSI transaction (for Warm Swap). When the WS_ENABLE/ pin
is asserted, after detection of the next bus free state, the SCSI signals
are 3-stated. This occurs so that the LSI53C180 no longer passes
through signals until the WS_ENABLE/ pin is deasserted HIGH and both
SCSI buses enter the Bus Free state. As an indication that the chip is
idle, or ready to be warm swapped, the XFER_ACTIVE signal deasserts
LOW. An LED or some other indicator could be connected to the
XFER_ACTIVE signal. To isolate buses in certain situations, use this
Warm Swap Enable feature.
2.1.8.3 Transfer Active (XFER_ACTIVE)
This output is an indication that the chip has finished its internal testing,
the SCSI bus has entered a Bus Free state, and SCSI traffic can now
Table 2.3 RESET/ Control Signal Polarity
Signal Level State Effect
LOW = 0 Asserted Reset is forced to all internal LSI53C180 elements.
HIGH = 1 Deasserted LSI53C180 is not in a forced reset state.
Table 2.4 WS_ENABLE/ Signal Polarity
Signal Level State Effect
LOW = 0 Asserted The LSI53C180 is requested to go off-line after
detection of a SCSI Bus Free state.
HIGH = 1 Deasserted The LSI53C180 is enabled to run normally.