Avago Technologies LSI53C180 - Manual (Page 48)

3-14 Specifications
Figure 3.7 Rise and Fall Time Test Conditions
t
F
Fall time, 90% to 10% 4.0 18.5 ns Figure 3.7
dV
H
/dt Slew rate, LOW to HIGH 0.15 0.50 V/ns Figure 3.7
dV
L
/dt Slew rate, HIGH to LOW 0.15 0.50 V/ns Figure 3.7
ESD Electrostatic discharge 2 – kV MIL-STD-883C;
3015-7
Latch-up 100 – mA –
Filter delay 20 30 ns Figure 3.8
Ultra filter delay 10 15 ns Figure 3.8
Ultra3 filter delay x x ns Figure 3.8
Extended filter delay 40 60 ns Figure 3.8
1. These values are guaranteed by periodic characterization; they are not 100% tested on every device.
2. Active negation outputs only: Data, Parity, SREQ/, SACK/. (Minus Pins) SCSI mode only.
3. Single pin only; irreversible damage may occur if sustained for one second.
4. SCSI RESET pin has 10 k
Ω
pull-up resistor.
Table 3.15 TolerANT Technology Electrical Characteristics
1
(Cont.)
Symbol Parameter Min Max Units Test Conditions
(Sheet 2 of 2)
20 pF
47
Ω
2.5 V
+
−