Measurement Computing CIO-DAS160x/1x - Manual (Page 40)

Counter section
Counter type 82C54
Configuration 3 down-counters, 16 bits each
Counter 0 - Independent, user configurable
Source: Programmable - Internal 100 kHz or external (CTR0 Clock In)
Gate: External (DIn2)
Output: Available at user connector (CTR0 Out)
Counter 1 - ADC Pacer Lower Divider
Source: 1 or 10 MHz oscillator (jumper selectable)
Gate:
Tied to Counter 2 gate, programmable source.
Output: Chained to Counter 2 Clock.
Counter 2 - ADC Pacer Upper Divider
Source: Counter 1 Output.
Gate: Tied to Counter 1 gate, programmable source.
Output: ADC Pacer clock
Clock input frequency 10 MHz max
High pulse width (clock input) 30 ns min
Low pulse width (clock input) 50 ns min
Gate width high 50 ns min
Gate width low 50 ns min
Input low voltage 0.8V max
Input high voltage 2.0V min
Output low voltage 0.4V max
Output high voltage 3.0V min
Environmental
Operating temperature range 0 to 50°C
Storage temperature range
−20 to 70°C
Humidity 0 to 90% non-condensing
Weight 11.2 oz. (320g)
9.2 CIO-DAS1602/16
Power consumption
+5 1.4 A typical, 2.1 A max
Analog input section
A/D converter type ADS7805 successive approximation
Resolution 16 bits
Programmable ranges ±10V, ±5V, ±2.5V, ±1.25V, 0 to 10V, 0 to 5V, 0 to 2.5V,
0 to 1.25V
A/D pacing Programmable: external source (Din0, positive edge) or
internal counter (positive or negative edge, jumper-select
able) or software-polled
Burstmode 13.3 µs
Data transfer From 512-sample FIFO via interrupt, DMA, DT-Connect to
external memory board or software polled
Polarity Unipolar/Bipolar, switch selectable
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