Artesyn MOTLoad Firmware Package User's Manual (February 2015) - Manual (Page 277)

Safe Start and Alternate Boot Image
MOTLoad Firmware Package User’s Manual (6806800C24D) 277
E.6.3 Board State Requirements
Alternate boot images may expect the board to be in a particular state. Hence, the MOTLoad
boot loader attempts to generalize the state of the system as follows upon transferring control:
1. The MMU is disabled.
2. L1 instruction cache has been initialized and is enabled.
3. L1 data cache has been initialized (invalidated) and disabled.
4. L2 cache is disabled.
5. L3 cache is disabled (if present).
6. UART is initialized
7. RAM is initialized and is mapped starting at CPU address 0.
8. RAM is scrubbed of ECC or parity errors if RAM ECC or parity is supported.
9. The active Flash bank (boot) is mapped to the upper end of the address space.
10. Image is copied to RAM at the address specified by ImageRamAddress if specified by
COPY_TO_RAM.
11. CPU register R1 (the stack pointer) is initialized to a value near the end of RAM.
12. CPU register R3 contains a pointer to the alternate boot data structure.
The boot loader does not perform further initialization of the board than that specified prior to
transferring control to an alternate boot image. Alternate boot images need to initialize the
board to whatever state the images may further require for its execution.
Only POST images are expected, but not required, to return to the boot loader. Upon return,
the boot loader proceeds with the scan for alternate boot images. A POST image that returns
control to the boot loader must ensure that upon return the state of the board is consistent
with the state of the board prior to POST entry.