Altera Cyclone IV GX FPGA Development Board - Manual (Page 42)

2–34 Chapter 2: Board Components
Components and Transceiver Interfaces
Cyclone IV GX FPGA Development Board May 2013 Altera Corporation
Reference Manual
J2.39 Dedicated CMOS clock out HSMB_CLK_OUT0
2.5-V
AA22 —
J2.40 Dedicated CMOS clock in HSMB_CLK_IN0 — U30.4
J2.41 Dedicated CMOS I/O bit 0 HSMB_D0 AH29 —
J2.42 Dedicated CMOS I/O bit 1 HSMB_D1 AE30 —
J2.43 Dedicated CMOS I/O bit 2 HSMB_D2 AD29 —
J2.44 Dedicated CMOS I/O bit 3 HSMB_D3 AG29 —
J2.47 CMOS bit 4 HSMB_TX_D_P0 AB28 —
J2.48 CMOS bit 5 HSMB_RX_D_P0 AB30 —
J2.49 CMOS bit 6 HSMB_TX_D_N0 AC30 —
J2.50 CMOS bit 7 HSMB_RX_D_N0 AA28 —
J2.53 CMOS bit 8 HSMB_TX_D_P1 Y28 —
J2.54 CMOS bit 9 HSMB_RX_D_P1 AA27 —
J2.55 CMOS bit 10 HSMB_TX_D_N1 AA26 —
J2.56 CMOS bit 11 HSMB_RX_D_N1 AD30 —
J2.59 CMOS bit 12 HSMB_TX_D_P2 AC28 —
J2.60 CMOS bit 13 HSMB_RX_D_P2 AB27 —
J2.61 CMOS bit 14 HSMB_TX_D_N2 AB26 —
J2.62 CMOS bit 15 HSMB_RX_D_N2 AB25 —
J2.65 CMOS bit 16 HSMB_TX_D_P3 AG30 —
J2.66 CMOS bit 17 HSMB_RX_D_P3 AE28 —
J2.67 CMOS bit 18 HSMB_TX_D_N3 V21 —
J2.68 CMOS bit 19 HSMB_RX_D_N3 AD26 —
J2.71 CMOS bit 20 HSMB_TX_D_P4 AF28 —
J2.72 CMOS bit 21 HSMB_RX_D_P4 AC25 —
J2.73 CMOS bit 22 HSMB_TX_D_N4 AE27 —
J2.74 CMOS bit 23 HSMB_RX_D_N4 AD25 —
J2.77 CMOS bit 24 HSMB_TX_D_P5 AE26 —
J2.78 CMOS bit 25 HSMB_RX_D_P5 AJ30 —
J2.79 CMOS bit 26 HSMB_TX_D_N5 AE25 —
J2.80 CMOS bit 27 HSMB_RX_D_N5 Y22 —
J2.83 CMOS bit 28 HSMB_T_TX_D_P6 — U36.12
J2.84 CMOS bit 29 HSMB_T_RX_D_P6 — U38.17
J2.85 CMOS bit 30 HSMB_T_TX_D_N6 — U36.13
J2.86 CMOS bit 31 HSMB_T_RX_D_N6 — U38.16
J2.89 CMOS bit 32 HSMB_T_TX_D_P7 — U36.14
J2.90 CMOS bit 33 HSMB_T_RX_D_P7 — U38.15
J2.91 CMOS bit 34 HSMB_T_TX_D_N7 — U36.15
J2.92 CMOS bit 35 HSMB_T_RX_D_N7 — U38.12
Table 2–34. HSMC Port B Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 5)
Board
Reference
Description Schematic Signal
Name
I/O Standard
Cyclone IV GX
Device
Pin Number
Other
Connections