beautypg.com

ADLINK CoreModule 745 User Manual

Page 45

background image

Chapter 4

BIOS Setup

CoreModule 745

Reference Manual

39

South Bridge Chipset Configuration

SMBUS Controller [Enabled; Disabled]

Onboard Ethernet Controller [Enabled; Disabled]

Video Function Configuration

Initiate Graphic Adapter [PCI/IGD; IGD]

Internal Graphics Mode Select [Enabled, 8MB]

DVMT Mode Select [DVMT Mode; Fixed Mode]

DVMT/Fixed Memory [128MB; 256MB; Maximum DVMT]

Boot Display Device [CRT; LVDS; CRT + LVDS]

Flat Panel Type [640x480; 800x600; 1024x768; 1280x800; 1366x768]

Spread Spectrum Clock [Disabled; Enabled]

IDE Configuration

ATA/IDE Configuration [Disabled; Compatible; Enhanced]

Legacy IDE Channels [SATA Only; SATA Pri, PATA Sec]

Primary IDE Master [Not Detected]

Primary IDE Slave [Not Detected]

Secondary IDE Master [XGB NANDrive]

Type [Not Installed; Auto; CD/DVD; ARMD]

LBA/Large Mode [Disabled; Auto]

Block (Multi-Sector Transfer) [Disabled; Auto]

PIO Mode [Auto; 0; 1; 2; 3; 4]

DMA Mode [Auto; SWDMA0; SWDMA1; SWDMA2; MWDMA0; MWDMA1;
MWDMA2; UDMA0; UDMA1; UDMA2; UDMA3; UDMA4]

S.M.A.R.T. [Auto; Disabled; Enabled]

32Bit Data Transfer [Disabled; Enabled]

Secondary IDE Slave [Not Detected]

Third IDE Master [Not Detected]

Third IDE Slave [Not Detected]

AHCI Settings

AHCI Port0 [Not Detected]

AHCI Port2 [Not Detected]

Super IO Configuration

Serial Port1 Address [Disabled; 3F8; 3E8; 2E8]

Serial Port1 IRQ [3; 4; 10; 11]

RS-485 Control for SP1 [Disabled; Enabled]

Serial Port2 Address [Disabled; 2F8; 3E8; 2E8]

Serial Port2 IRQ [3; 4; 10; 11]

RS-485 Control for SP2 [Disabled; Enabled]