Digilent DIO2 User Manual

Page 2

Digilab DIO2 Reference Manual

Digilent, Inc.

www.digilentinc.com

page 2 of 19

Functional description

The DIO2 board includes many frequently used peripheral devices found in digital systems, including
several output display devices and several input devices. When mated with a Digilab main board, the
DIO2 board provides a highly flexible digital system development platform. The DIO2 board centers
on a Xilinx XC95108 CPLD that provides a convenient interface to most of the I/O devices, as well as
a control bus between an attached system board and the I/O devices. Since the CPLD on the DOI2
board is user configurable, many different I/O control and communication schemes can easily be
implemented.

Although the DIO2 board has been designed as a peripheral board for various Digilab system boards, it
can also be used as a CPLD demonstration/development board. Digilent produces a low cost power
supply/programming board that can be connected to the DIO2 board to create a stand-alone, very low
cost CPLD platform. This board, called the DXC95 board, provides a JTAG programming interface, a
power supply, a clock source, and a small breadboard area (see www.digilentinc.com for more
information).

This document presents the
circuits, I/O devices, and
interfaces in the DIO2 board.
When needed, manufacturer part
numbers have been provided so
that further reference material
can be obtained from their
websites.

Signals

All named signals used on the
DIO2 board are defined in the
table on the right. Voltage levels
for all signals arriving from an
attached Digilab system board
are determined by the system
board, but all signals arising on
the I/O board derive from the
on-board 5VDC regulator (so
they are all 5V CMOS signals).

The DIO2 board uses a two-
layer process, so all signals are
available on the top and bottom
layers. Many signals are brought
to a test point header for easy
test and measurement equipment
attachment.

Power Supplies

Unregulated power supply voltage from attached system
board – typically 5-9VDC. Available only on J1 P40, this
supply is regulated to 5VDC to supply on onboard devices.

VDD*

Regulated power supply voltage (5VDC) from on-board
regulator. This supply is used by all devices on DIO2 board.

GND*

System

ground

CPLD – system board bus signals

D7-D0*

Bi-directional data bus between B connector and CPLD/LCD

A5-A0*

Address lines to select locations in CPLD

CS*

Chip select used for CPLD interface on DIO2 board

WE*

Write enable for CPLD memory locations

OE*

Output enable for CPLD data signals

BOCI*

“Button Out-Clock In” pin, used as clock input to CPLD

LCD control signals

D7-D0

Data bus – same as CPLD data signals

LCD_RW* LCD Read/Write signal – ‘1’ for read mode

LCD_RS*

LCD Register Select – ‘1’ for data register, ‘0’ for instruction

LCD_E

LCD Enable signal – active high; falling edge latches data

VGA and PS2 signals (routed directly from B connector, not through CPLD)

HS*

VGA Horizontal Sync signal

VS*

VGA Vertical Sync signal

R1, R0*

VGA 2-bit red data

G2-G0*

VGA 3-bit green data

B2-B0*

VGA 3-bit blue data

KCLK*

PS2 (Keyboard or Mouse) clock signal

KDAT*

PS2 (Keyboard or Mouse) data signal

On board devices (routed through CPLD)

BTN0-E

Pushbuttons (A through E)

SW1-SW8

Slide switches (1 through 8)

LD0-LDF

Discreet LEDs (0 through F)

CA-CF

Seven-segment display cathodes

AN1-AN3

Seven-segment display anodes

* available on test point header

Table 1. DIO2 board signal definitions